535 search results - page 9 / 107 » The Cache Performance and Optimizations of Blocked Algorithm... |
104
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VALUETOOLS
2006
ACM
15 years 5 months ago
2006
ACM
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
HPCC
2007
Springer
15 years 5 months ago
2007
Springer
This paper presents a new algorithm for computing the singular value decomposition (SVD) on multilevel memory hierarchy architectures. This algorithm is based on one-sided JRS iter...
102
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ALGORITHMICA
2005
14 years 11 months ago
2005
An optimal prefetching and I/O scheduling algorithm L-OPT, for parallel I/O systems, using a read-once model of block references is presented. The algorithm uses knowledge of the n...
185
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GECCO
2009
Springer
14 years 9 months ago
2009
Springer
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallel...
DAC
1998
ACM
16 years 18 days ago
1998
ACM
Memory is one of the most restricted resources in many modern embedded systems. Code compression can provide substantial savings in terms of size. In a compressed code CPU, a cach...