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» The Case for a Single-Chip Multiprocessor
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CASES
2008
ACM
15 years 1 months ago
Efficiency and scalability of barrier synchronization on NoC based many-core architectures
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
Oreste Villa, Gianluca Palermo, Cristina Silvano
CAV
2006
Springer
165views Hardware» more  CAV 2006»
15 years 3 months ago
Bounded Model Checking of Concurrent Data Types on Relaxed Memory Models: A Case Study
Many multithreaded programs employ concurrent data types to safely share data among threads. However, highly-concurrent algorithms for even seemingly simple data types are difficul...
Sebastian Burckhardt, Rajeev Alur, Milo M. K. Mart...
IPPS
2006
IEEE
15 years 5 months ago
Power-performance efficiency of asymmetric multiprocessors for multi-threaded scientific applications
Recently, under a fixed power budget, asymmetric multiprocessors (AMP) have been proposed to improve the performance of multi-threaded applications compared to symmetric multiproc...
Ryan E. Grant, Ahmad Afsahi
RTAS
2002
IEEE
15 years 4 months ago
The Aperiodic Multiprocessor Utilization Bound for Liquid Tasks
Real-time scheduling theory has developed powerful tools for translating conditions on aggregate system utilization into per-task schedulability guarantees. The main breakthrough ...
Tarek F. Abdelzaher, Björn Andersson, Jan Jon...
ISCA
1994
IEEE
129views Hardware» more  ISCA 1994»
15 years 3 months ago
Software Versus Hardware Shared-Memory Implementation: A Case Study
We comparethe performance of software-supported shared memory on a general-purpose network to hardware-supported shared memory on a dedicated interconnect. Up to eight processors,...
Alan L. Cox, Sandhya Dwarkadas, Peter J. Keleher, ...