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» The Case for a Single-Chip Multiprocessor
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WSC
1997
15 years 1 months ago
Visualizing Parallel Simulations in Network Computing Environments: A Case Study
Parallel discrete event simulation systems (PDES) are used to simulate large-scale applications such as modeling telecommunication networks, transportation grids, and battlefield...
Christopher D. Carothers, Brad Topol, Richard Fuji...
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
15 years 8 months ago
Performance Efficiency of Context-Flow System-on-Chip Platform
Recent efforts in adapting computer networks into system-on-chip (SOC), or network-on-chip, present a setback to the traditional computer systems for the lack of effective program...
Rami Beidas, Jianwen Zhu
SIES
2009
IEEE
15 years 6 months ago
A modular fast simulation framework for stream-oriented MPSoC
—The performance estimation of complex multi-processor systems-on-chip (MPSoC) in a reasonable amount of time and with a good accuracy becomes more and more challenging due to th...
Kai Huang, Iuliana Bacivarov, Jun Liu, Wolfgang Ha...
ETS
2010
IEEE
130views Hardware» more  ETS 2010»
15 years 25 days ago
A distributed architecture to check global properties for post-silicon debug
Post-silicon validation and debug, or ensuring that software executes correctly on the silicon of a multi-processor system-on-chip (MPSOC) is complicated, as it involves checking g...
Erik Larsson, Bart Vermeulen, Kees Goossens
116
Voted
CORR
2010
Springer
146views Education» more  CORR 2010»
14 years 9 months ago
Multi-Criteria Evaluation of Partitioning Schemes for Real-Time Systems
In this paper we study the partitioning approach for multiprocessor real-time scheduling. This approach seems to be the easiest since, once the partitioning of the task set has be...
Irina Lupu, Pierre Courbin, Laurent George, Jo&eum...