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» The Case for a Single-Chip Multiprocessor
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CASES
2000
ACM
15 years 4 months ago
A dynamic memory management unit for embedded real-time system-on-a-chip
Dealing with global on-chip memory allocation/de-allocation in a dynamic yet deterministic way is an important issue for upcoming billion transistor multiprocessor System-on-a-Chi...
Mohamed Shalan, Vincent John Mooney III
CASES
2008
ACM
15 years 1 months ago
Multi-granularity sampling for simulating concurrent heterogeneous applications
Detailed or cycle-accurate/bit-accurate (CABA) simulation is a critical phase in the design flow of embedded systems. However, with increasing system complexity, full detailed sim...
Melhem Tawk, Khaled Z. Ibrahim, Smaïl Niar
CASES
2005
ACM
15 years 1 months ago
Software-directed power-aware interconnection networks
Interconnection networks have been deployed as the communication fabric in a wide range of parallel computer systems. With recent technological trends allowing growing quantities ...
Vassos Soteriou, Noel Eisley, Li-Shiuan Peh
ISCA
2005
IEEE
90views Hardware» more  ISCA 2005»
15 years 5 months ago
Optimizing Replication, Communication, and Capacity Allocation in CMPs
Chip multiprocessors (CMPs) substantially increase capacity pressure on the on-chip memory hierarchy while requiring fast access. Neither private nor shared caches can provide bot...
Zeshan Chishti, Michael D. Powell, T. N. Vijaykuma...
CASES
2009
ACM
15 years 6 months ago
Towards scalable reliability frameworks for error prone CMPs
As technology scales and the energy of computation continually approaches thermal equilibrium [1,2], parameter variations and noise levels will lead to larger error rates at vario...
Joseph Sloan, Rakesh Kumar