148 search results - page 12 / 30 » The Challenges of Hardware Synthesis from C-Like Languages |
ICCAD
2010
IEEE
14 years 10 months ago
2010
IEEE
Clock networks contribute a significant fraction of dynamic power and can be a limiting factor in high-performance CPUs and SoCs. The need for multi-objective optimization over a l...
106
Voted
FPL
2007
Springer
15 years 6 months ago
2007
Springer
Multiprocessor systems-on-chip (MPSoC) are being developed in increasing numbers to support the high number of applications running on modern embedded systems. Designing and progr...
114
Voted
CAV
2008
Springer
15 years 2 months ago
2008
Springer
The growing design-productivity gap has made designers shift toward using high-level languages like C, C++ and Java to do system-level design. High-Level Synthesis (HLS) is the pro...
104
Voted
DATE
1999
IEEE
15 years 4 months ago
1999
IEEE
There is an increasing research interest in system level design languages which can carry designers from specification to implementation of system-on-a-chip. Unfortunately, two of...
ICCD
2002
IEEE
15 years 9 months ago
2002
IEEE
Our goal is to identify the key architectural and design issues related to Sensor Networks (SNs), evaluate the proposed solutions, and to outline the most challenging research dir...