Sciweavers

148 search results - page 15 / 30
» The Challenges of Hardware Synthesis from C-Like Languages
Sort
View
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
15 years 6 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
CODES
2005
IEEE
15 years 6 months ago
Rappit: framework for synthesis of host-assisted scripting engines for adaptive embedded systems
Scripting is a powerful, high-level, cross-platform, dynamic, easy way of composing software modules as black boxes. Unfortunately, the high runtime overhead has prevented scripti...
Jiwon Hahn, Qiang Xie, Pai H. Chou
85
Voted
DAC
1995
ACM
15 years 4 months ago
Synthesis of Software Programs for Embedded Control Applications
— Software components for embedded reactive real-time applications must satisfy tight code size and runtime constraints. Cooperating finite state machines provide a convenient i...
Massimiliano Chiodo, Paolo Giusto, Attila Jurecska...
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
15 years 9 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
122
Voted
LCTRTS
2010
Springer
14 years 10 months ago
Translating concurrent action oriented specifications to synchronous guarded actions
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
Jens Brandt, Klaus Schneider, Sandeep K. Shukla