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DFT
2005
IEEE
178views VLSI» more  DFT 2005»
15 years 3 months ago
Inter-Plane Via Defect Detection Using the Sensor Plane in 3-D Heterogeneous Sensor Systems
Defect and fault tolerance is being studied in a 3D Heterogeneous Sensor using a stacked chip with sensors located on the top plane, and inter-plane vias connecting these to other...
Glenn H. Chapman, Vijay K. Jain, Shekhar Bhansali
EUROPAR
2008
Springer
14 years 11 months ago
Fault-Tolerant Partial Replication in Large-Scale Database Systems
We investigate a decentralised approach to committing transactions in a replicated database, under partial replication. Previous protocols either reexecute transactions entirely an...
Pierre Sutra, Marc Shapiro
SIGOPS
2011
210views Hardware» more  SIGOPS 2011»
14 years 5 months ago
Small trusted primitives for dependable systems
Secure, fault-tolerant distributed systems are difficult to build, to validate, and to operate. Conservative design for such systems dictates that their security and fault toleran...
Petros Maniatis, Byung-Gon Chun
ICCD
2006
IEEE
113views Hardware» more  ICCD 2006»
15 years 7 months ago
A theory of Error-Rate Testing
— We have entered an era where chip yields are decreasing with scaling. A new concept called intelligible testing has been previously proposed with the goal of reversing this tre...
Shideh Shahidi, Sandeep Gupta
CORR
2011
Springer
167views Education» more  CORR 2011»
14 years 5 months ago
Maximum Metric Spanning Tree made Byzantine Tolerant
Self-stabilization is a versatile approach to fault-tolerance since it permits a distributed system to recover from any transient fault that arbitrarily corrupts the contents of a...
Swan Dubois, Toshimitsu Masuzawa, Sébastien...