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» The Complexity of Iterated Multiplication
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ICCD
2003
IEEE
104views Hardware» more  ICCD 2003»
16 years 21 days ago
On Reducing Register Pressure and Energy in Multiple-Banked Register Files
The storage for speculative values in superscalar processors is one of the main sources of complexity and power dissipation. In this paper, we present a novel technique to reduce ...
Jaume Abella, Antonio González
ISCAS
2007
IEEE
119views Hardware» more  ISCAS 2007»
15 years 10 months ago
Hardened by Design Techniques for Implementing Multiple-Bit Upset Tolerant Static Memories
— We present a novel MBU-tolerant design, which utilizes layout-based interleaving and multiple-node disruption tolerant memory latches. This approach protects against grazing in...
Daniel R. Blum, José G. Delgado-Frias
ISCAS
2006
IEEE
145views Hardware» more  ISCAS 2006»
15 years 9 months ago
The wordlength determination problem of linear time invariant systems with multiple outputs - a geometric programming approach
This paper proposes two new methods for optimizing objectives and constraints. The GP approach is very general and hardware resources in finite wordlength implementation of it allo...
S. C. Chan, K. M. Tsui
CAD
1999
Springer
15 years 3 months ago
Multiple sweeping using the Denavit-Hartenberg representation method
The method of consecutive revolving or extrusion of a geometric entity in a CAD system is typically used by a designer to represent complex solids. While it is evident that consec...
Karim Abdel-Malek, Saeb Othman
ISMIR
2001
Springer
117views Music» more  ISMIR 2001»
15 years 8 months ago
Score Processing For MIR
The focus of this paper is on the design and use of a music score representation. The structure of the representation is discussed and illustrated with sample algorithms, includin...
Donncha Ó. Maidín