Very Long Instruction Word (VLIW) architectures exploit instruction level parallelism (ILP) with the help of the compiler to achieve higher instruction throughput with minimal hard...
In this work we investigate the impact of evolving memory system features, such as large on-chip caches, automatic prefetch, and the growing distance to main memory on 3D stencil ...
Shoaib Kamil, Parry Husbands, Leonid Oliker, John ...
The avian retino-tecto-rotundal pathway plays a central role in motion analysis and features complex connectivity. Yet, the relation between the pathway's structural arrangeme...
Alireza S. Mahani, Reza Khanbabaie, Harald Luksch,...
We develop a computational model of shape that extends existing Riemannian models of shape of curves to multidimensional objects of general topological type. We construct shape sp...
Xiuwen Liu, Yonggang Shi, Ivo D. Dinov, Washington...
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, ...