34181 search results - page 6454 / 6837 » The Computer System GRAPHOGRAPH |
165
Voted
SPIN
2000
Springer
15 years 8 months ago
2000
Springer
The Temporal Rover is a specification based verification tool for applications written in C, C++, Java, Verilog and VHDL. The tool combines formal specification, using Linear-Time ...
135
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DAC
1995
ACM
15 years 8 months ago
1995
ACM
High-level synthesis (HLS) has been successfully targeted towards the digital signal processing (DSP) domain. Both application-speci c integrated circuits (ASICs) and application-...
126
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DAC
1995
ACM
15 years 8 months ago
1995
ACM
— Software components for embedded reactive real-time applications must satisfy tight code size and runtime constraints. Cooperating finite state machines provide a convenient i...
165
Voted
WFLP
2000
Springer
15 years 8 months ago
2000
Springer
We introduce a framework for assessing the effectiveness of partial evaluators in functional logic languages. Our framework is based on properties of the rewrite system that models...
134
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GD
1995
Springer
15 years 8 months ago
1995
Springer
Abstract. When adjusting a graph layout, it is often desirable to preserve various properties of the original graph in the adjusted view. Pertinent properties may include straightn...