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» The Concurrent Matching Switch Architecture
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VLSID
2004
IEEE
212views VLSI» more  VLSID 2004»
14 years 6 months ago
On Design and Implementation of an Embedded Automatic Speech Recognition System
We present a new design of an Embedded Speech Recognition System. It combines the aspects of both hardware and software design to implement a speaker dependent, isolated word, sma...
Sujay Phadke, Rhishikesh Limaye, Siddharth Verma, ...
COOPIS
1998
IEEE
13 years 10 months ago
A Generative Communication Service for Database Interoperability
Parallel and distributed programming is conceptually harder to undertake and to understand than sequential programming, because a programmer often has to manage the coexistence an...
Wilhelm Hasselbring, Mark Roantree
ANCS
2006
ACM
13 years 10 months ago
Efficient memory utilization on network processors for deep packet inspection
Deep Packet Inspection (DPI) refers to examining both packet header and payload to look for predefined patterns, which is essential for network security, intrusion detection and c...
Piti Piyachon, Yan Luo
ICFP
2012
ACM
11 years 8 months ago
Nested data-parallelism on the gpu
Graphics processing units (GPUs) provide both memory bandwidth and arithmetic performance far greater than that available on CPUs but, because of their Single-Instruction-Multiple...
Lars Bergstrom, John H. Reppy
PC
2007
161views Management» more  PC 2007»
13 years 5 months ago
High performance combinatorial algorithm design on the Cell Broadband Engine processor
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
David A. Bader, Virat Agarwal, Kamesh Madduri, Seu...