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» The Correctness of an Optimized Code Generation
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DAC
2009
ACM
16 years 5 months ago
WCET-aware register allocation based on graph coloring
Current compilers lack precise timing models guiding their built-in optimizations. Hence, compilers apply ad-hoc heuristics during optimization to improve code quality. One of the...
Heiko Falk
ICPP
1999
IEEE
15 years 8 months ago
Compiler Optimizations for I/O-Intensive Computations
This paper describes transformation techniques for out-of-core programs (i.e., those that deal with very large quantities of data) based on exploiting locality using a combination...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...
PLDI
2006
ACM
15 years 10 months ago
Optimizing data permutations for SIMD devices
The widespread presence of SIMD devices in today’s microprocessors has made compiler techniques for these devices tremendously important. One of the most important and difficul...
Gang Ren, Peng Wu, David A. Padua
PLDI
1997
ACM
15 years 8 months ago
Flick: A Flexible, Optimizing IDL Compiler
An interface definition language (IDL) is a nontraditional language for describing interfaces between software components. IDL compilers generate “stubs” that provide separat...
Eric Eide, Kevin Frei, Bryan Ford, Jay Lepreau, Ga...
WCRE
2002
IEEE
15 years 9 months ago
Register Liveness Analysis for Optimizing Dynamic Binary Translation
Dynamic binary translators compile machine code from a source architecture to a target architecture at run time. Due to the hard time constraints of just-in-time compilation only ...
Mark Probst, Andreas Krall, Bernhard Scholz