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» The Correctness of an Optimized Code Generation
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RSP
2008
IEEE
182views Control Systems» more  RSP 2008»
15 years 6 months ago
From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding
ASIP-based implementations constitute a key trend in SoC design enabling optimal tradeoffs between performance and flexibility. This paper details a case study of an ASIP-based im...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...
IEEEPACT
2003
IEEE
15 years 5 months ago
Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU
Graphics and media processing is quickly emerging to become one of the key computing workloads. Programmable graphics processors give designers extra flexibility by running a sma...
Mauricio Breternitz Jr., Herbert H. J. Hum, Sanjee...
HIS
2007
15 years 1 months ago
Genetic Programming meets Model-Driven Development
Genetic programming is known to provide good solutions for many problems like the evolution of network protocols and distributed algorithms. In such cases it is most likely a hard...
Thomas Weise, Michael Zapf, Mohammad Ullah Khan, K...
ARC
2010
Springer
183views Hardware» more  ARC 2010»
15 years 1 days ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards
CASES
2007
ACM
15 years 3 months ago
Stack size reduction of recursive programs
For memory constrained environments like embedded systems, optimization for program size is often as important, if not more important, as optimization for execution speed. Commonl...
Stefan Schäckeler, Weijia Shang