Sciweavers

1145 search results - page 204 / 229
» The Correctness of an Optimized Code Generation
Sort
View
EMSOFT
2004
Springer
15 years 5 months ago
Binary translation to improve energy efficiency through post-pass register re-allocation
Energy efficiency is rapidly becoming a first class optimization parameter for modern systems. Caches are critical to the overall performance and thus, modern processors (both hig...
Kun Zhang, Tao Zhang, Santosh Pande
HICSS
1995
IEEE
128views Biometrics» more  HICSS 1995»
15 years 3 months ago
Instruction Level Parallelism
Abstract. We reexamine the limits of parallelism available in programs, using runtime reconstruction of program data-flow graphs. While limits of parallelism have been examined in...
ACMSE
2004
ACM
15 years 5 months ago
Execution characteristics of SPEC CPU2000 benchmarks: Intel C++ vs. Microsoft VC++
Modern processors include features such as deep pipelining, multilevel cache hierarchy, branch predictors, out of order execution engine, and advanced floating point and multimedi...
Swathi Tanjore Gurumani, Aleksandar Milenkovic
109
Voted
CVPR
2005
IEEE
16 years 1 months ago
Hierarchical Part-Based Visual Object Categorization
We propose a generative model that codes the geometry and appearance of generic visual object categories as a loose hierarchy of parts, with probabilistic spatial relations linkin...
Guillaume Bouchard, Bill Triggs
91
Voted
DAC
2000
ACM
16 years 22 days ago
Memory aware compilation through accurate timing extraction
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...
Peter Grun, Nikil D. Dutt, Alexandru Nicolau