4190 search results - page 75 / 838 » The Cost of Design |
MICRO
1999
IEEE
15 years 4 months ago
1999
IEEE
Building a high-performance microprocessor presents many reliability challenges. Designers must verify the correctness of large complex systems and construct implementations that ...
CORR
2007
Springer
14 years 12 months ago
2007
Springer
Min, Veeravalli, and Barlas have proposed strategies to minimize the overall execution time of one or several divisible loads on a heterogeneous linear network, using one or more ...
ICCAD
1996
IEEE
15 years 4 months ago
1996
IEEE
- Key characteristics of newly emerging IC technologies render the traditional concept of die size minimization and traditional "design rules" insufficient to handle the ...
NCA
2008
IEEE
15 years 6 months ago
2008
IEEE
In this work, using a game-theoretic approach, costsensitive mechanisms that lead to reliable Internet-based computing are designed. In particular, we consider Internet-based mast...
FPGA
2010
ACM
15 years 6 months ago
2010
ACM
Triple Modular Redundancy (TMR) is a common reliability technique for mitigating single event upsets (SEUs) in FPGA designs operating in radiation environments. For FPGA systems t...