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ICCAD
2003
IEEE
99views Hardware» more  ICCAD 2003»
15 years 9 months ago
A Probabilistic Approach to Buffer Insertion
This work presents a formal probabilistic approach for solving optimization problems in design automation. Prediction accuracy is very low especially at high levels of design flo...
Vishal Khandelwal, Azadeh Davoodi, Akash Nanavati,...
CCR
2000
113views more  CCR 2000»
15 years 3 months ago
TCP rate control
TCP congestion control 9] is designed for network stability, robustness and opportunistic use of network bu er and bandwidth resources on an end-to-end per-connection basis. Upon ...
Shrikrishna Karandikar, Shivkumar Kalyanaraman, Pr...
FPGA
2006
ACM
125views FPGA» more  FPGA 2006»
15 years 7 months ago
Armada: timing-driven pipeline-aware routing for FPGAs
While previous research has shown that FPGAs can efficiently implement many types of computations, their flexibility inherently limits their clock rate. Several research groups ha...
Kenneth Eguro, Scott Hauck
OL
2010
128views more  OL 2010»
15 years 2 months ago
A biased random-key genetic algorithm for road congestion minimization
One of the main goals in transportation planning is to achieve solutions for two classical problems, the traffic assignment and toll pricing problems. The traffic assignment proble...
Luciana S. Buriol, Michael J. Hirsch, Panos M. Par...
139
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DAC
2005
ACM
16 years 5 months ago
Memory access optimization through combined code scheduling, memory allocation, and array binding in embedded system design
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
Jungeun Kim, Taewhan Kim