5005 search results - page 197 / 1001 » The Design and Analysis of Parallel Algorithms |
129
Voted
DAC
2010
ACM
15 years 3 months ago
2010
ACM
Packet-switched networks-on-chip (NoC) have been proposed as an efficient communication infrastructure for multi-core architectures. Adding virtual channels to a NoC helps to avoi...
107
Voted
ACSD
2005
IEEE
15 years 9 months ago
2005
IEEE
We describe a toolbox for the analysis of Systems-on-achip described in SystemC at the transactional level. The tools are able to extract information from SystemC code, and to bui...
164
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BIBM
2009
IEEE
15 years 10 months ago
2009
IEEE
Abstract—Unacceptable execution time of Non-rigid registration (NRR) often presents a major obstacle to its routine clinical use. Parallel computing is an effective way to accele...
133
Voted
ASAP
2005
IEEE
15 years 9 months ago
2005
IEEE
The task of automatic design space exploration of heterogeneous multi-processor systems is often tackled with Evolutionary Algorithms. In this paper, we propose a novel approach i...
142
Voted
ECCV
2000
Springer
16 years 5 months ago
2000
Springer
This paper focuses on matching 1D structures by variational methods. We provide rigorous rules for the construction of the cost function, on the basis of an analysis of properties ...