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» The Design and Analysis of Parallel Algorithms
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TECS
2008
122views more  TECS 2008»
15 years 4 months ago
Quantitative analysis of the speed/accuracy trade-off in transaction level modeling
tion. Transaction Level Modeling (TLM) has been proposed to abstract communication for highspeed system simulation and rapid design space exploration. Although being widely accepte...
Gunar Schirner, Rainer Dömer
APPT
2009
Springer
15 years 11 months ago
Performance Improvement of Multimedia Kernels by Alleviating Overhead Instructions on SIMD Devices
SIMD extension is one of the most common and effective technique to exploit data-level parallelism in today’s processor designs. However, the performance of SIMD architectures i...
Asadollah Shahbahrami, Ben H. H. Juurlink
TCAD
2002
118views more  TCAD 2002»
15 years 4 months ago
Application-specific clustered VLIW datapaths: early exploration on a parameterized design space
Specialized clustered very large instruction word (VLIW) processors combined with effective compilation techniques enable aggressive exploitation of the high instruction-level para...
Viktor S. Lapinskii, Margarida F. Jacome, Gustavo ...
DAC
2004
ACM
16 years 5 months ago
STAC: statistical timing analysis with correlation
Current technology trends have led to the growing impact of both inter-die and intra-die process variations on circuit performance. While it is imperative to model parameter varia...
Jiayong Le, Xin Li, Lawrence T. Pileggi
ICPADS
2006
IEEE
15 years 11 months ago
Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems
—Recently, high-end reconfigurable computing systems that employ Field-Programmable Gate Arrays (FPGAs) as hardware accelerators for general-purpose processors have been built. T...
Ling Zhuo, Viktor K. Prasanna