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» The Design and Optimization of SOC Test Solutions
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NOCS
2009
IEEE
15 years 4 months ago
Networks-on-chip in emerging interconnect paradigms: Advantages and challenges
Communication plays a crucial role in the design and performance of multi-core systems-on-chip (SoCs). Networks-on-chip (NoCs) have been proposed as a promising solution to simpli...
Luca P. Carloni, Partha Pande, Yuan Xie
DATE
2003
IEEE
145views Hardware» more  DATE 2003»
15 years 2 months ago
Optimal Reconfiguration Functions for Column or Data-bit Built-In Self-Repair
In modern SoCs, embedded memories occupy the largest part of the chip area and include an even larger amount of active devices. As memories are designed very tightly to the limits...
Michael Nicolaidis, Nadir Achouri, Slimane Boutobz...
DAC
2005
ACM
14 years 11 months ago
Performance space modeling for hierarchical synthesis of analog integrated circuits
Automated analog sizing is becoming an unavoidable solution for increasing analog design productivity. The complexity of typical analog SoC subsystems however calls for efficient ...
Georges G. E. Gielen, Trent McConaghy, Tom Eeckela...
CEC
2007
IEEE
15 years 3 months ago
Finding trade-off solutions close to KKT points using evolutionary multi-objective optimization
— Despite having a wide-spread applicability of evolutionary optimization procedures over the past few decades, EA researchers still face criticism about the theoretical optimali...
Kalyanmoy Deb, Rahul Tewari, Mayur Dixit, Joydeep ...
BWCCA
2010
14 years 4 months ago
Advanced Design Issues for OASIS Network-on-Chip Architecture
Network-on-Chip (NoC) architectures provide a good way of realizing efficient interconnections and largely alleviate the limitations of bus-based solutions. NoC has emerged as a so...
Kenichi Mori, Adam Esch, Abderazek Ben Abdallah, K...