Sciweavers

225 search results - page 11 / 45
» The Design and Optimization of SOC Test Solutions
Sort
View
78
Voted
ROBOCUP
1999
Springer
153views Robotics» more  ROBOCUP 1999»
15 years 1 months ago
ISocRob - Intelligent Society of Robots
Abstract. The SocRob project was born as a challenge for multidisciplinary research on broad and generic approaches for the design of a cooperative robot society, involving Control...
Rodrigo M. M. Ventura, Pedro Aparício, Carl...
DATE
2005
IEEE
110views Hardware» more  DATE 2005»
15 years 3 months ago
Rapid Generation of Thermal-Safe Test Schedules
Overheating has been acknowledged as a major issue in testing complex SOCs. Several power constrained system-level DFT solutions (power constrained test scheduling) have recently ...
Paul M. Rosinger, Bashir M. Al-Hashimi, Krishnendu...
DATE
2010
IEEE
122views Hardware» more  DATE 2010»
15 years 1 months ago
Optimal regulation of traffic flows in networks-on-chip
We have proposed (, )-based flow regulation to reduce delay and backlog bounds in SoC architectures, where bounds the traffic burstiness and the traffic rate. The regulation is co...
Fahimeh Jafari, Zhonghai Lu, Axel Jantsch, Mohamma...
ICCD
2004
IEEE
122views Hardware» more  ICCD 2004»
15 years 6 months ago
Linear Programming based Techniques for Synthesis of Network-on-Chip Architectures
Network-on-chip (NoC) has been proposed as a solution for the communication challenges of System-on-chip (SoC) design in the nanoscale regime. SoC design offers the opportunity fo...
Krishnan Srinivasan, Karam S. Chatha, Goran Konjev...
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
15 years 3 months ago
A technique for low energy mapping and routing in network-on-chip architectures
Network-on-chip (NoC) has been proposed as a solution for the global communication challenges of System-on-chip (SoC) design in the nanoscale technologies. NoC design with mesh ba...
Krishnan Srinivasan, Karam S. Chatha