225 search results - page 7 / 45 » The Design and Optimization of SOC Test Solutions |
DFT
2003
IEEE
15 years 2 months ago
2003
IEEE
Test scheduling and Test Access Mechanism (TAM) design are two important tasks in the development of a System-on-Chip (SOC) test solution. Previous test scheduling techniques assu...
ISVLSI
2007
IEEE
15 years 3 months ago
2007
IEEE
Abstract— Time-to-Market plays a central role on System-ona-Chip (SoC) competitiveness and the quality of the final product is a matter of concern as well. As SoCs complexity in...
ICCAD
2002
IEEE
15 years 6 months ago
2002
IEEE
With increasing design sizes and adoption of System on a Chip (SoC) methodology, design synthesis and test automation tools are hitting capacity and performance bottlenecks. Curre...
IOLTS
2008
IEEE
15 years 3 months ago
2008
IEEE
An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. Most of the existing built-in self-repair solutions reuse IP-C...
VLSID
2008
IEEE
15 years 10 months ago
2008
IEEE
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...