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ISQED
2009
IEEE
69views Hardware» more  ISQED 2009»
15 years 4 months ago
Parametric analysis to determine accurate interconnect extraction corners for design performance
In this paper we propose a technique to determine accurate interconnect extraction corners for a 65-nm design using parametric RC extraction and timing analysis. We calculate the ...
Ayhan A. Mutlu, Jiayong Le, Ruben Molina, Mustafa ...
UML
2004
Springer
15 years 2 months ago
A Metamodel for Generating Performance Models from UML Designs
Several different kinds of performance models can be generated from sets of scenarios that describe typical responses of a system, and their use of resources. The Core Scenario Mod...
Dorin Bogdan Petriu, C. Murray Woodside
DAC
2001
ACM
15 years 10 months ago
LOTTERYBUS: A New High-Performance Communication Architecture for System-on-Chip Designs
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshmi...
COOPIS
2002
IEEE
15 years 2 months ago
Design and Performance of Asynchronous Method Handling for CORBA
This paper describes the design and performance of a new asynchronous method handling (AMH) mechanism that allows CORBA servers to process client requests asynchronously. AMH deco...
Mayur Deshpande, Douglas C. Schmidt, Carlos O'Ryan...
DAC
2008
ACM
15 years 10 months ago
Design of high performance pattern matching engine through compact deterministic finite automata
Pattern matching relies on deterministic finite automata (DFA) to search for predefined patterns. While a bit-DFA method is recently proposed to exploit the parallelism in pattern...
Piti Piyachon, Yan Luo