This paper explores and quantifies garbage collection behavior for three whole heap collectors and generational counterparts: copying semi-space, mark-sweep, and reference counti...
Stephen M. Blackburn, Perry Cheng, Kathryn S. McKi...
Many future shared-memory multiprocessor servers will both target commercial workloads and use highly-integrated “glueless” designs. Implementing low-latency cache coherence i...
While a number of User-Level Protocols have been developed to reduce the gap between the performance capabilities of the physical network and the performance actually available, a...
Pavan Balaji, Piyush Shivam, Pete Wyckoff, Dhabale...
Cognitive Radio (CR) technology constitutes a new paradigm to provide additional spectrum utilization opportunities in wireless ad hoc networks. Recent research in this field has ...
Marco Di Felice, Kaushik Roy Chowdhury, Luciano Bo...
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...