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ICS
2009
Tsinghua U.
15 years 10 months ago
Less reused filter: improving l2 cache performance via filtering less reused lines
The L2 cache is commonly managed using LRU policy. For workloads that have a working set larger than L2 cache, LRU behaves poorly, resulting in a great number of less reused lines...
Lingxiang Xiang, Tianzhou Chen, Qingsong Shi, Wei ...
DAC
2004
ACM
16 years 4 months ago
Toward a methodology for manufacturability-driven design rule exploration
Resolution enhancement techniques (RET) such as optical proximity correction (OPC) and phase-shift mask (PSM) technology are deployed in modern processes to increase the fidelity ...
Luigi Capodieci, Puneet Gupta, Andrew B. Kahng, De...
SIES
2007
IEEE
15 years 9 months ago
Design Space Exploration with Evolutionary Multi-Objective Optimisation
— High level synthesis is one of the next major steps to improve the hw/sw co-design process. The advantages of high nthesis are two-fold. At first the level of abstraction is r...
Martin Holzer 0002, Bastian Knerr, Markus Rupp
ISSS
2002
IEEE
138views Hardware» more  ISSS 2002»
15 years 8 months ago
An Object-Oriented Design Process for System-on-Chip Using UML
The object-oriented design process has been a hot topic in software development since it will improve product quality and productivity significantly, which is also a major issue i...
Tsuneo Nakata, Akio Matsuda, Minoru Shoji, Shinya ...
124
Voted
DAC
2006
ACM
16 years 4 months ago
Design tools for reliability analysis
Recent progress in EDA tools allows IC designs to be accurately verified with consequent improvements in yield and performance through reduced guard bands. This paper will present...
Zhihong Liu, Bruce McGaughy, James Z. Ma