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» The Design and Performance of MedJava
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158
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WOSP
2005
ACM
15 years 9 months ago
Performance evaluation of UML software architectures with multiclass Queueing Network models
Software performance based on performance models can be applied at early phases of the software development cycle to characterize the quantitative behavior of software systems. We...
Simonetta Balsamo, Moreno Marzolla
127
Voted
ISLPED
2000
ACM
101views Hardware» more  ISLPED 2000»
15 years 8 months ago
Design issues for dynamic voltage scaling
Processors in portable electronic devices generally have a computational load which has time-varying performance requirements. Dynamic Voltage Scaling is a method to vary the proc...
Thomas D. Burd, Robert W. Brodersen
PDP
2010
IEEE
15 years 10 months ago
Impact of Parallel Workloads on NoC Architecture Design
— Due to the multi-core processors, the importance of parallel workloads has increased considerably. However, manycore chips demand new interconnection strategies, since traditio...
Henrique Cota de Freitas, Lucas Mello Schnorr, Mar...
ICC
2008
IEEE
127views Communications» more  ICC 2008»
15 years 10 months ago
Pre-Equalization and Precoding Design for Frequency-Selective Fading Channels
— In this paper, we consider the joint transmitter and receiver design problem based on a novel approximate maximum likelihood decision feedback equalizer (A-ML-DFE) over frequen...
Lingyang Song, Are Hjørungnes, Manav R. Bha...
124
Voted
DATE
2005
IEEE
96views Hardware» more  DATE 2005»
15 years 9 months ago
DVS for On-Chip Bus Designs Based on Timing Error Correction
On-chip buses are typically designed to meet performance constraints at worst-case conditions, including process corner, temperature, IR-drop, and neighboring net switching patter...
Himanshu Kaul, Dennis Sylvester, David Blaauw, Tre...