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141
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SBACPAD
2008
IEEE
170views Hardware» more  SBACPAD 2008»
15 years 10 months ago
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
James Poe, Chang-Burm Cho, Tao Li
ISESE
2005
IEEE
15 years 9 months ago
Empirical study design in the area of high-performance computing (HPC)
The development of High-Performance Computing (HPC) programs is crucial to progress in many fields of scientific endeavor. We have run initial studies of the productivity of HPC d...
Forrest Shull, Jeffrey Carver, Lorin Hochstein, Vi...
113
Voted
ICIP
1995
IEEE
16 years 5 months ago
Parallel programmable video co-processor design
Modern video applications call for computationally intensive data processing at very high data rate. In order to meet the high-performance/low-cost constraints, the stateof-the-ar...
An-Yeu Wu, K. J. Ray Liu, Arun Raghupathy, Shang-C...
DAC
2006
ACM
16 years 4 months ago
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
Saurabh K. Tiwary, Pragati K. Tiwary, Rob A. Ruten...
136
Voted
GLOBECOM
2008
IEEE
15 years 10 months ago
MIMO Receiver Design in the Presence of Radio Frequency Interference
—Multi-input multi-output (MIMO) receivers have been designed and their communication performance analyzed under the assumption of additive Gaussian noise. Wireless transceivers,...
Kapil Gulati, Aditya Chopra, Robert W. Heath Jr., ...