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ROBIO
2006
IEEE
130views Robotics» more  ROBIO 2006»
15 years 9 months ago
GA-Based Multi-Objective Optimal Design of a Planar 3-DOF Cable-Driven Parallel Manipulator
— The architecture optimization of a three degrees of freedom (3-DOF) planar cable-driven parallel manipulator (CDPM) with multiple objectives has been implemented by means of GA...
Yangmin Li, Qingsong Xu
FPL
2004
Springer
74views Hardware» more  FPL 2004»
15 years 9 months ago
A Structured Methodology for System-on-an-FPGA Design
Abstract. Increasing logic resources coupled with a proliferation of integrated performance enhancing primitives in high-end FPGAs results in an increased design complexity which r...
N. Pete Sedcole, Peter Y. K. Cheung, George A. Con...
DAC
2002
ACM
16 years 4 months ago
Unlocking the design secrets of a 2.29 Gb/s Rijndael processor
This contribution describes the design and performance testing of an Advanced Encryption Standard (AES) compliant encryption chip that delivers 2.29 GB/s of encryption throughput ...
Patrick Schaumont, Henry Kuo, Ingrid Verbauwhede
DATE
2009
IEEE
83views Hardware» more  DATE 2009»
15 years 10 months ago
Performance-driven dual-rail insertion for chip-level pre-fabricated design
In recent years, pre-fabricated design styles grow up rapidly to amortize the mask cost. However, the interconnection delay of the pre-fabricated design styles slows down the circ...
Fu-Wei Chen, Yi-Yu Liu
ISCAS
2005
IEEE
127views Hardware» more  ISCAS 2005»
15 years 9 months ago
Wire-driven microarchitectural design space exploration
— In this paper, we propose an interconnect-driven framework that performs an efficient and effective design space exploration for deep submicron processor architecture design. ...
Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram,...