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VTS
2005
IEEE
116views Hardware» more  VTS 2005»
15 years 10 months ago
Closed-Form Simulation and Robustness Models for SEU-Tolerant Design
— A closed-form model for simulation and analysis of voltage transients caused by single-event upsets (SEUs) in logic circuits is described. A linear RC model, derived using a SP...
Kartik Mohanram
CHES
2005
Springer
170views Cryptology» more  CHES 2005»
15 years 10 months ago
Design of Testable Random Bit Generators
Abstract. In this paper, the evaluation of random bit generators for security applications is discussed and the concept of stateless generator is introduced. It is shown how, for t...
Marco Bucci, Raimondo Luzzi
DCOSS
2005
Springer
15 years 10 months ago
Design and Analysis of Wave Sensing Scheduling Protocols for Object-Tracking Applications
Abstract. Many sensor network applications demand tightly-bounded object detection quality. To meet such stringent requirements, we develop three sensing scheduling protocols to gu...
Shansi Ren, Qun Li, Haining Wang, Xiaodong Zhang
ICAPR
2005
Springer
15 years 10 months ago
Designing a Fast Convolution Under the LIP Paradigm Applied to Edge Detection
The Logarithmic Image Processing model (LIP) is a robust mathematical framework for the processing of transmitted and reflected images. It follows many visual, physical and psycho...
José M. Palomares, Jesús Gonzá...
ICCS
2005
Springer
15 years 10 months ago
Design and Implementation of DAG-Based Co-scheduling of RPC in the Grid
Effective scheduling in the Grid consisting of heterogeneous and distributed resources is imperative in order to counter unacceptably large overheads of the Grid. We proposed the ...
JiHyun Choi, DongWoo Lee, Rudrapatna S. Ramakrishn...