17409 search results - page 403 / 3482 » The Design and Performance of MedJava |
147
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CODES
2006
IEEE
15 years 11 months ago
2006
IEEE
The use of Application Specific Instruction-set Processors (ASIP) is a solution to the problem of increasing complexity in embedded systems design. One of the major challenges in...
141
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ISCA
2006
IEEE
15 years 10 months ago
2006
IEEE
Long interconnects are becoming an increasingly important problem from both power and performance perspectives. This motivates designers to adopt on-chip network-based communicati...
161
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IPPS
2010
IEEE
15 years 2 months ago
2010
IEEE
Abstract--Clusters featuring the InfiniBand interconnect are continuing to scale. As an example, the "Ranger" system at the Texas Advanced Computing Center (TACC) include...
283
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GLVLSI
2011
IEEE
14 years 8 months ago
2011
IEEE
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
162
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ISCA
2011
IEEE
14 years 8 months ago
2011
IEEE
A growing body of work has compiled a strong case for the single-ISA heterogeneous multi-core paradigm. A single-ISA heterogeneous multi-core provides multiple, differently-design...