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ISCAS
2007
IEEE
84views Hardware» more  ISCAS 2007»
15 years 11 months ago
High Speed 1-bit Bypass Adder Design for Low Precision Additions
—In this paper, we propose a high speed adder which is adopted for our reconfigurable architecture called FleXilicon. To support sub-word parallelism, the FleXilicon architecture...
Jong-Suk Lee, Dong Sam Ha
ICIP
2007
IEEE
15 years 11 months ago
Software Pipelines Design for Variable Block-Size Motion Estimation with Large Search Range
This paper presents some techniques for efficient motion estimation (ME) implementation on fixed-point digital signal processor (DSP) for high resolution video coding. First, chal...
Zhigang Yang, Wen Gao, Yan Liu, Debin Zhao
SLS
2007
Springer
103views Algorithms» more  SLS 2007»
15 years 11 months ago
Designing and Tuning SLS Through Animation and Graphics: An Extended Walk-Through
Stochastic Local Search (SLS) is quite effective for a variety of Combinatorial (Optimization) Problems (COP). However, the performance of SLS depends on several factors and getti...
Steven Halim, Roland H. C. Yap
UIC
2007
Springer
15 years 11 months ago
Maximizing Network Lifetime Under Reliability Constraints Using a Cross-Layer Design in Dense Wireless Sensor Networks
Abstract. Recent experimental studies have shown that radio links between low-power devices are extremely unreliable. In particular, the instability and unpredictability of low-pow...
Shan Guo Quan, Young Yong Kim
DATE
2006
IEEE
120views Hardware» more  DATE 2006»
15 years 11 months ago
Design and test of fixed-point multimedia co-processor for mobile applications
: In this research, a fixed-point multimedia co-processor is designed and tested into an ARM-10 based mobile graphics processor for portable 2-D and 3-D multimedia applications. Th...
Ju-Ho Sohn, Jeong-Ho Woo, Jerald Yoo, Hoi-Jun Yoo