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FPL
2005
Springer
140views Hardware» more  FPL 2005»
15 years 3 months ago
A Low-Energy FPGA: Architecture Design and Software-Supported Design Flow
The aim of the PhD thesis is the development of systematic methodologies both for hardware and software level for designing low-energy and performance efficient reconfigurable sys...
K. Siozios, Dimitrios Soudris, Adonios Thanailakis
TWC
2008
137views more  TWC 2008»
14 years 9 months ago
Decoding, Performance Analysis, and Optimal Signal Designs for Coordinate Interleaved Orthogonal Designs
Space-time block codes (STBC) using coordinate interleaved orthogonal designs (CIOD) proposed recently by Khan and Rajan allow single-complex symbol decoding and offer higher data ...
Dung Ngoc Dao, Chintha Tellambura
NOCS
2010
IEEE
14 years 7 months ago
Asynchronous Bypass Channels: Improving Performance for Multi-synchronous NoCs
Abstract--Networks-on-Chip (NoC) have emerged as a replacement for traditional shared-bus designs for on-chip communications. As with all current VLSI designs, however, reducing po...
Tushar N. K. Jain, Paul V. Gratz, Alexander Sprint...
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EVOW
2005
Springer
15 years 3 months ago
A Performance Evaluation Framework for Nature Inspired Routing Algorithms
Performance evaluation of routing protocols is an important area of research that deals with the analysis and investigation of such protocols. A performance evaluation framework un...
Horst Wedde, Muddassar Farooq
WOSP
2000
ACM
15 years 2 months ago
A pattern-based approach to model software performance
In this paper we present a formal approach to analyse performance for distributed systems, which is integrated in the early stages of the software development process. We propose ...
José Merseguer, Javier Campos, Eduardo Mena