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DAC
2007
ACM
16 years 7 months ago
Gate Sizing For Cell Library-Based Designs
With increasing time-to-market pressure and shortening semiconductor product cycles, more and more chips are being designed with library-based methodologies. In spite of this shif...
Shiyan Hu, Mahesh Ketkar, Jiang Hu
DAC
2005
ACM
16 years 7 months ago
Memory access optimization through combined code scheduling, memory allocation, and array binding in embedded system design
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
Jungeun Kim, Taewhan Kim
SIGSOFT
2004
ACM
16 years 7 months ago
Reasoning about partial goal satisfaction for requirements and design engineering
Exploring alternative options is at the heart of the requirements and design processes. Different alternatives contribute to different degrees of achievement of non-functional goa...
Emmanuel Letier, Axel van Lamsweerde
WWW
2007
ACM
16 years 7 months ago
C-ODO: an OWL Meta-model for Collaborative Ontology Design
The design and maintenance of ontologies is a complex social collaborative activity, and this is true especially for semantic-web ontologies. On the one hand, such activity calls ...
Aldo Gangemi, Jos Lehmann, Valentina Presutti, Mal...
HPCA
2009
IEEE
16 years 6 months ago
A low-radix and low-diameter 3D interconnection network design
Interconnection plays an important role in performance and power of CMP designs using deep sub-micron technology. The network-on-chip (NoCs) has been proposed as a scalable and hi...
Bo Zhao, Jun Yang 0002, Xiuyi Zhou, Yi Xu, Youtao ...