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TC
2010
15 years 4 months ago
Design and Analysis of On-Chip Networks for Large-Scale Cache Systems
—Switched networks have been adopted in on-chip communication for their scalability and efficient resource sharing. However, using a general network for a specific domain may res...
Yuho Jin, Eun Jung Kim, Ki Hwan Yum
TCOM
2010
107views more  TCOM 2010»
15 years 4 months ago
Near-Capacity Cooperative Space-Time Coding Employing Irregular Design and Successive Relaying
— In this paper, we develop a capacity-approaching Cooperative Space-Time Coding (CSTC) scheme employing irregular design for a twin-relay aided network as an extension of our pr...
Lingkun Kong, Soon Xin Ng, Robert G. Maunder, Lajo...
SAMOS
2010
Springer
15 years 4 months ago
OpenCL-based design methodology for application-specific processors
OpenCL is a programming language standard which enables the programmer to express the application by structuring its computation as kernels. The OpenCL compiler is given the explic...
Pekka O. Jaskelainen, Carlos S. de La Lama, Pablo ...
HPCA
2009
IEEE
16 years 6 months ago
Design and implementation of software-managed caches for multicores with local memory
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
Sangmin Seo, Jaejin Lee, Zehra Sura
DATE
2009
IEEE
215views Hardware» more  DATE 2009»
16 years 1 months ago
EMC-aware design on a microcontroller for automotive applications
In modern digital ICs, the increasing demand for performance and throughput requires operating frequencies of hundreds of megahertz, and in several cases exceeding the gigahertz r...
Patrice Joubert Doriol, Yamarita Villavicencio, Cr...