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TC
2008
15 years 7 months ago
Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
ENTCS
2006
143views more  ENTCS 2006»
15 years 7 months ago
Component-Oriented Specification of Performance Measures
Formal notations for system performance modeling need to be equipped with suitable notations for specifying performance measures. These companion notations have been traditionally...
Alessandro Aldini, Marco Bernardo
VLDB
1999
ACM
131views Database» more  VLDB 1999»
15 years 11 months ago
High-Performance Extensible Indexing
Today’s object-relational DBMSs (ORDBMSs) are designed to support novel application domains by providing an extensible architecture, supplemented by domain-specific database ex...
Marcel Kornacker
CBSE
2006
Springer
15 years 11 months ago
A Process for Resolving Performance Trade-Offs in Component-Based Architectures
Designing architectures requires the balancing of multiple system quality objectives. In this paper, we present techniques that support the exploration of the quality properties of...
Egor Bondarev, Michel R. V. Chaudron, Peter H. N. ...
DAS
2006
Springer
15 years 11 months ago
Ground Truth for Layout Analysis Performance Evaluation
Over the past two decades a significant number of layout analysis (page segmentation and region classification) approaches have been proposed in the literature. Each approach has b...
Apostolos Antonacopoulos, Dimosthenis Karatzas, Da...