17409 search results - page 555 / 3482 » The Design and Performance of MedJava |
163
click to vote
ISCA
1987
IEEE
15 years 11 months ago
1987
IEEE
This paper presents a new multiprocessor architecture for the parallel execution of logic programs, developed as part of the Aquarius Project. This architecture is designed to sup...
216
click to vote
HIPEAC
2010
Springer
15 years 9 months ago
2010
Springer
The optimistic nature of Transactional Memory (TM) systems can lead to the concurrent execution of transactions that are later found to conflict. Conflicts degrade scalability, a...
227
click to vote
TVLSI
2008
15 years 7 months ago
2008
The on-chip communication architecture is a major determinant of overall performance in complex System-on-Chip (SoC) designs. Since the communication requirements of SoC components...
211
click to vote
EENERGY
2010
15 years 10 months ago
2010
Power consumption of the Information and Communication Technology sector (ICT) has recently become a key challenge. In particular, actions to improve energy-efficiency of Internet...
238
click to vote
CODES
2008
IEEE
15 years 9 months ago
2008
IEEE
Synchronous languages like Esterel have been widely adopted for designing reactive systems in safety-critical domains such as avionics. Specifications written in Esterel are based...