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DAC
2004
ACM
16 years 8 months ago
Automatic generation of breakpoint hardware for silicon debug
Scan-based silicon debug is a technique that can be used to help find design errors in prototype silicon more quickly. One part of this technique involves the inclusion of breakpo...
Bart Vermeulen, Mohammad Zalfany Urfianto, Sandeep...
WECWIS
2006
IEEE
141views ECommerce» more  WECWIS 2006»
16 years 1 months ago
Iterative Combinatorial Auctions with Linear Prices: Results of Numerical Experiments
Iterative Combinatorial Auctions (ICA) have been getting increasing attention in computer science and economics, as they provide an efficient solution to resource allocation prob...
Alexander Pikovsky, Pasha Shabalin, Martin Bichler
203
Voted
ISCAS
2003
IEEE
147views Hardware» more  ISCAS 2003»
16 years 22 days ago
Parameterized and low power DSP core for embedded systems
Conventional ASIC designs are hard to be customized. Therefore DSP core-based ASIC design has potentially large payoff. This approach not only supports improved performance but al...
Ya-Lan Tsao, Ming Hsuan Tan, Jun-Xian Teng, Shyh-J...
ISCAS
2002
IEEE
81views Hardware» more  ISCAS 2002»
16 years 12 days ago
Concept of phase-noise tuning of bipolar voltage-controlled oscillators
So far, oscillators have been designed to perform a specific task while the key parameters such as phase-noise and power consumption are set by the hardware design and not by the ...
Aleksandar Tasic, Wouter A. Serdijn
217
Voted
ASPDAC
2009
ACM
249views Hardware» more  ASPDAC 2009»
16 years 4 days ago
Automatic generation of Cycle Accurate and Cycle Count Accurate transaction level bus models from a formal model
— This paper proposes the first automatic approach to simultaneously generate Cycle Accurate and Cycle Count Accurate transaction level bus models. Since TLM (Transaction Level M...
Chen Kang Lo, Ren-Song Tsay