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WCNC
2008
IEEE
15 years 4 months ago
Throughput and Delay Performance Analysis of Packet Aggregation Scheme for PRMA
—Packet reservation multiple access (PRMA) protocol is an implicit reservation MAC protocol. It is initially designed for voice packets in the cellular networks [2], [3] but it is...
Qi Zhang, Villy Bæk Iversen, Frank H. P. Fit...
CODES
2007
IEEE
15 years 4 months ago
Performance improvement of block based NAND flash translation layer
With growing capacities of flash memories, an efficient layer to manage read and write access to flash is required. NFTL is a widely used block based flash translation layer de...
Siddharth Choudhuri, Tony Givargis
ISQED
2005
IEEE
140views Hardware» more  ISQED 2005»
15 years 3 months ago
Toward Quality EDA Tools and Tool Flows Through High-Performance Computing
As the scale and complexity of VLSI circuits increase, Electronic Design Automation (EDA) tools become much more sophisticated and are held to increasing standards of quality. New...
Aaron N. Ng, Igor L. Markov
MSS
2005
IEEE
175views Hardware» more  MSS 2005»
15 years 3 months ago
High Performance Storage System Scalability: Architecture, Implementation and Experience
The High Performance Storage System (HPSS) provides scalable hierarchical storage management (HSM), archive, and file system services. Its design, implementation and current domin...
Richard W. Watson
DATE
2003
IEEE
117views Hardware» more  DATE 2003»
15 years 3 months ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen