17409 search results - page 78 / 3482 » The Design and Performance of MedJava |
GLVLSI
2010
IEEE
15 years 2 months ago
2010
IEEE
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
ISCA
2009
IEEE
15 years 4 months ago
2009
IEEE
Industry has shifted towards multi-core designs as we have hit the memory and power walls. However, single thread performance remains of paramount importance since some applicatio...
ICS
2001
Tsinghua U.
15 years 2 months ago
2001
Tsinghua U.
The caching behavior of multimedia applications has been described as having high instruction reference locality within small loops, very large working sets, and poor data cache p...
HPCA
2000
IEEE
15 years 2 months ago
2000
IEEE
This paper explores area/parallelism tradeo s in the design of distributed shared-memory (DSM) multiprocessors built out of large single-chip computing nodes. In this context, are...
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VLSID
2001
IEEE
15 years 10 months ago
2001
IEEE
The emergence of several communication architectures for System-on-Chips provides designers with a variety of design alternatives. In addition, the need to customize the system ar...