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IEEEPACT
2005
IEEE
15 years 5 months ago
Design and Implementation of a Compiler Framework for Helper Threading on Multi-core Processors
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
Yonghong Song, Spiros Kalogeropulos, Partha Tiruma...
ISCA
1998
IEEE
125views Hardware» more  ISCA 1998»
15 years 4 months ago
Performance Characterization of a Quad Pentium Pro SMP using OLTP Workloads
Commercial applications are an important, yet often overlooked, workload with significantly different characteristics from technical workloads. The potential impact of these diffe...
Kimberly Keeton, David A. Patterson, Yong Qiang He...
ADC
2005
Springer
113views Database» more  ADC 2005»
15 years 5 months ago
Schemes of Storing XML Query Cache
XML query caching for XML database-backed Web applications began to be investigated recently. However, the issue of how the cached query results are stored has not been addressed ...
Hyunchul Kang, Seungchul Han, Younghyun Kim
SAINT
2003
IEEE
15 years 5 months ago
A Generalized Target-Driven Cache Replacement Policy for Mobile Environments
Caching frequently accessed data items on the client side is an effective technique to improve the system performance in wireless networks. Due to cache size limitations, cache re...
Liangzhong Yin, Guohong Cao, Ying Cai
ISSS
1996
IEEE
125views Hardware» more  ISSS 1996»
15 years 4 months ago
Size-Constrained Code Placement for Cache Miss Rate Reduction
In design of an embedded system with a cache, it is important to minimize the cache miss rate to reduce the power consumption as well as to improvethe performance of the system. W...
Hiroyuki Tomiyama, Hiroto Yasuura