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» The Design and Performance of a Conflict-Avoiding Cache
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ICCD
2004
IEEE
106views Hardware» more  ICCD 2004»
15 years 8 months ago
Energy Characterization of Hardware-Based Data Prefetching
This paper evaluates several hardware-based data prefetching techniques from an energy perspective, and explores their energy/performance tradeoffs. We present detailed simulation...
Yao Guo, Saurabh Chheda, Israel Koren, C. Mani Kri...
EVOW
2011
Springer
14 years 3 months ago
Two Iterative Metaheuristic Approaches to Dynamic Memory Allocation for Embedded Systems
Abstract. Electronic embedded systems designers aim at finding a tradeoff between cost and power consumption. As cache memory management has been shown to have a significant imp...
María Soto, André Rossi, Marc Sevaux
JEC
2006
107views more  JEC 2006»
14 years 11 months ago
A dynamically reconfigurable cache for multithreaded processors
Chip multi-processors (CMP) are rapidly emerging as an important design paradigm for both high performance and embedded processors. These machines provide an important performance...
Alex Settle, Dan Connors, Enric Gibert, Antonio Go...
CAL
2006
14 years 12 months ago
Performance modeling using Monte Carlo simulation
Abstract-- Cycle accurate simulation has long been the primary tool for micro-architecture design and evaluation. Though accurate, the slow speed often imposes constraints on the e...
Ram Srinivasan, Jeanine Cook, Olaf M. Lubeck
DAC
2002
ACM
16 years 23 days ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy