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» The Design and Performance of a Conflict-Avoiding Cache
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DAC
2008
ACM
16 years 25 days ago
Cache modeling in probabilistic execution time analysis
Multimedia-dominated consumer electronics devices (such as cellular phone, digital camera, etc.) operate under soft real-time constraints. Overly pessimistic worst-case execution ...
Yun Liang, Tulika Mitra
VLSID
2009
IEEE
143views VLSI» more  VLSID 2009»
16 years 13 days ago
SACR: Scheduling-Aware Cache Reconfiguration for Real-Time Embedded Systems
Dynamic reconfiguration techniques are widely used for efficient system optimization. Dynamic cache reconfiguration is a promising approach for reducing energy consumption as well...
Weixun Wang, Prabhat Mishra, Ann Gordon-Ross
ICPP
2003
IEEE
15 years 5 months ago
Enabling Partial Cache Line Prefetching Through Data Compression
Hardware prefetching is a simple and effective technique for hiding cache miss latency and thus improving the overall performance. However, it comes with addition of prefetch buff...
Youtao Zhang, Rajiv Gupta
DAC
2009
ACM
15 years 4 months ago
Heterogeneous code cache: using scratchpad and main memory in dynamic binary translators
Dynamic binary translation (DBT) can be used to address important issues in embedded systems. DBT systems store translated code in a software-managed code cache. Unlike general-pu...
José Baiocchi, Bruce R. Childers
FAST
2010
15 years 2 months ago
Panache: A Parallel File System Cache for Global File Access
Cloud computing promises large-scale and seamless access to vast quantities of data across the globe. Applications will demand the reliability, consistency, and performance of a t...
Marc Eshel, Roger L. Haskin, Dean Hildebrand, Mano...