867 search results - page 69 / 174 » The Design and Performance of a Conflict-Avoiding Cache |
ICPP
2003
IEEE
15 years 5 months ago
2003
IEEE
A hardware-assisted design, dubbed cache-oriented multistage structure (COMS), is proposed for fast packet forwarding. COMS incorporates small on-chip cache memory in its constitu...
DATE
2008
IEEE
15 years 6 months ago
2008
IEEE
This paper proposes a dynamic cache repartitioning technique that enhances compositionality on platforms executing media applications with multiple utilization scenarios. The repa...
101
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SC
1992
ACM
15 years 3 months ago
1992
ACM
We are currently developing Willow, a shared-memory multiprocessor whose design provides system capacity and performance capable of supporting over a thousand commercial microproc...
181
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VLDB
2002
ACM
16 years 1 days ago
2002
ACM
Relational database systems have traditionally optimized for I/O performance and organized records sequentially on disk pages using the N-ary Storage Model (NSM) (a.k.a., slotted ...
MICRO
2003
IEEE
15 years 5 months ago
2003
IEEE
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...