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» The Design and Performance of a Conflict-Avoiding Cache
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MICRO
2008
IEEE
138views Hardware» more  MICRO 2008»
15 years 6 months ago
Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs
As the number of transistors integrated on a chip continues to increase, a growing challenge is accurately modeling performance in the early stages of processor design. Analytical...
Xi E. Chen, Tor M. Aamodt
CANPC
1999
Springer
15 years 4 months ago
Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware
Streamlining communication is key to achieving good performance in shared-memory parallel programs. While full hardware support for cache coherence generally offers the best perfo...
David Brooks, Margaret Martonosi
ICDE
2010
IEEE
189views Database» more  ICDE 2010»
15 years 1 days ago
Caching all plans with just one optimizer call
Abstract— Modern database management systems (DBMS) answer a multitude of complex queries on increasingly larger datasets. Given the complexities of the queries and the numerous ...
Debabrata Dash, Ioannis Alagiannis, Cristina Maier...
DAC
2003
ACM
16 years 25 days ago
Accurate timing analysis by modeling caches, speculation and their interaction
Schedulability analysis of real-time embedded systems requires worst case timing guarantees of embedded software performance. This involves not only language level program analysi...
Xianfeng Li, Tulika Mitra, Abhik Roychoudhury
ICNP
2006
IEEE
15 years 5 months ago
Benefit-based Data Caching in Ad Hoc Networks
—Data caching can significantly improve the efficiency of information access in a wireless ad hoc network by reducing the access latency and bandwidth usage. However, designing e...
Bin Tang, Himanshu Gupta, Samir R. Das