867 search results - page 82 / 174 » The Design and Performance of a Conflict-Avoiding Cache |
PRDC
2005
IEEE
15 years 5 months ago
2005
IEEE
An important issue in modern cache designs is bridging the gap between wire and device delays. This warrants the use of more regular and modular structures to mask wire latencies....
103
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IOPADS
1996
15 years 1 months ago
1996
Many parallel scientific applications need high-performance I/O. Unfortunately, end-to-end parallel-I/O performance has not been able to keep up with substantial improvements in p...
100
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GLVLSI
2010
IEEE
15 years 4 months ago
2010
IEEE
Flash Memory is a desirable candidate for main memory replacement in embedded systems due to its low leakage power consumption, higher density and non-volatility characteristics. ...
CIDR
2007
15 years 1 months ago
2007
Prior research shows that database system performance is dominated by off-chip data stalls, resulting in a concerted effort to bring data into on-chip caches. At the same time, hi...
102
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JEC
2006
14 years 11 months ago
2006
This paper explores power consumption for destructive-read embedded DRAM. Destructive-read DRAM is based on conventional DRAM design, but with sense amplifiers optimized for lower ...