Sciweavers

652 search results - page 78 / 131
» The Distributed Flight Array
Sort
View
IPPS
2000
IEEE
15 years 3 months ago
Complexity Bounds for Lookup Table Implementation of Factored Forms in FPGA Technology Mapping
We consider technology mapping from factored form binary leaf-DAG to lookup tables LUTs, such as those found in eld programmable gate arrays. Polynomial time algorithms exist f...
Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi
59
Voted
HPCN
1999
Springer
15 years 3 months ago
XSIL: Extensible Scientific Interchange Language
We motivate and define the XSIL language as a flexible, hierarchical, extensible transport language for scientific data objects. The entire object may be represented in the file, o...
Kent Blackburn, Albert Lazzarini, Thomas A. Prince...
ICPADS
1994
IEEE
15 years 3 months ago
Delayed Precise Invalidation - A Software Cache Coherence Scheme
: Software cache coherence schemes are very desirable in the design of scalable multiprocessors and massively parallel processors. The authors propose a software cache coherence sc...
T.-S. Hwang, C.-P. Chung
CLUSTER
2004
IEEE
15 years 2 months ago
Predicting memory-access cost based on data-access patterns
Improving memory performance at software level is more effective in reducing the rapidly expanding gap between processor and memory performance. Loop transformations (e.g. loop un...
Surendra Byna, Xian-He Sun, William Gropp, Rajeev ...
EUROPAR
2000
Springer
15 years 2 months ago
Cache Remapping to Improve the Performance of Tiled Algorithms
With the increasing processing power, the latency of the memory hierarchy becomes the stumbling block of many modern computer architectures. In order to speed-up the calculations, ...
Kristof Beyls, Erik H. D'Hollander