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ICCAD
1996
IEEE
76views Hardware» more  ICCAD 1996»
15 years 3 months ago
Directional bias and non-uniformity in FPGA global routing architectures
This paper investigates the effect of the prefabricated routing track distribution on the area-efficiency of FPGAs. The first question we address is whether horizontal and vertica...
Vaughn Betz, Jonathan Rose
FSE
2006
Springer
174views Cryptology» more  FSE 2006»
15 years 2 months ago
Distinguishing Attacks on the Stream Cipher Py
The stream cipher Py designed by Biham and Seberry is a submission to the ECRYPT stream cipher competition. The cipher is based on two large arrays (one is 256 bytes and the other ...
Souradyuti Paul, Bart Preneel, Gautham Sekar
104
Voted
ICRA
2000
IEEE
124views Robotics» more  ICRA 2000»
15 years 2 months ago
Design of a Cricket Microrobot
Our goal is to develop an autonomous robot that will fit within a two-inch cube and will locomote by walking and jumping. The robot will be based on the kinematics of a cricket. I...
Matthew C. Birch, Roger D. Quinn, Geon Hahm, Steph...
85
Voted
WSC
2007
15 years 1 months ago
Parallel cross-entropy optimization
The Cross-Entropy (CE) method is a modern and effective optimization method well suited to parallel implementations. There is a vast array of problems today, some of which are hig...
Gareth E. Evans, Jonathan M. Keith, Dirk P. Kroese
ARC
2008
Springer
104views Hardware» more  ARC 2008»
15 years 1 months ago
PARO: Synthesis of Hardware Accelerators for Multi-Dimensional Dataflow-Intensive Applications
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
Frank Hannig, Holger Ruckdeschel, Hritam Dutta, J&...