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EUROPAR
2010
Springer
15 years 6 months ago
Efficient Address Mapping of Shared Cache for On-Chip Many-Core Architecture
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
Fenglong Song, Dongrui Fan, Zhiyong Liu, Junchao Z...
ICPP
2009
IEEE
15 years 11 months ago
Fine-grain Parallelism Using Multi-core, Cell/BE, and GPU Systems: Accelerating the Phylogenetic Likelihood Function
We are currently faced with the situation where applications have increasing computational demands and there is a wide selection of parallel processor systems. In this paper we fo...
Frederico Pratas, Pedro Trancoso, Alexandros Stama...
IPPS
2002
IEEE
15 years 10 months ago
The Self-Tuning dynP Job-Scheduler
In modern resource management systems for supercomputers and HPC-clusters the job-scheduler plays a major role in improving the performance and usability of the system. The perfor...
Achim Streit
169
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EUROPAR
2008
Springer
15 years 6 months ago
Load-Balancing for a Block-Based Parallel Adaptive 4D Vlasov Solver
This work is devoted to the numerical resolution of the 4D Vlasov equation using an adaptive mesh of phase space. We previously proposed a parallel algorithm designed for distribut...
Olivier Hoenen, Eric Violard
ISPDC
2005
IEEE
15 years 10 months ago
Enforcing consistency during the adaptation of a parallel component
Abstract. Grid architectures are execution environments that are known to be at the same time distributed, parallel, heterogeneous and dynamic. While current tools focus solutions ...
Jérémy Buisson, Françoise And...