2155 search results - page 14 / 431 » The EM-X Parallel Computer: Architecture and Basic Performan... |
126
Voted
IPPS
2006
IEEE
15 years 8 months ago
2006
IEEE
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
126
Voted
EUROPAR
2001
Springer
15 years 6 months ago
2001
Springer
Abstract. This paper describes a software architecture that allows image processing researchers to develop parallel applications in a transparent manner. The architecture’s main ...
186
Voted
CONPAR
1994
15 years 6 months ago
1994
The Rewrite Rule Machine (RRM) is a massively parallel MIMD/SIMD computer designed with the explicit purpose of supporting veryhigh-level parallel programming with rewrite rules. T...
111
click to vote
HPCC
2010
Springer
15 years 2 months ago
2010
Springer
Abstract--This paper examines the initial parallel implementation of SCATTER, a computationally intensive inelastic neutron scattering routine with polycrystalline averaging capabi...
FCCM
2006
IEEE
15 years 8 months ago
2006
IEEE
This paper presents a novel reconfigurable data flow processing architecture that promises high performance by explicitly targeting both fine- and course-grained parallelism. This...