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262
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PROCEDIA
2011
14 years 7 months ago
2011
Two decades of microprocessor architecture driven by quantitative 90/10 optimization has delivered an extraordinary 1000-fold improvement in microprocessor performance, enabled by...
149
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PPOPP
2010
ACM
15 years 11 months ago
2010
ACM
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
173
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CORR
2010
Springer
15 years 5 months ago
2010
Springer
Multiprocessor task scheduling is an important and computationally difficult problem. This paper proposes a comparison study of genetic algorithm and list scheduling algorithm. Bo...
110
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PADS
2003
ACM
15 years 10 months ago
2003
ACM
Federated simulation interfaces such as the High Level Architecture (HLA) were designed for interoperability, and as such are not traditionally associated with highperformance com...
136
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EUROPAR
2003
Springer
15 years 10 months ago
2003
Springer
Abstract. Performance analysis for terascale computing requires a combination of new concepts including distribution, on-line processing and automation. As a foundation for tools r...