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IPPS
1998
IEEE
15 years 5 months ago
Performance Range Comparison via Crossing Point Analysis
Parallel programming is elusive. The relative performance of di erent parallel implementations varies with machine architecture, system and problem size. How to compare di erent i...
Xian-He Sun
IPPS
2010
IEEE
14 years 12 months ago
Restructuring parallel loops to curb false sharing on multicore architectures
The memory hierarchy of most multicore systems contains one or more levels of cache that is shared among multiple cores. The shared-cache architecture presents many opportunities f...
Santosh Sarangkar, Apan Qasem
SBACPAD
2008
IEEE
249views Hardware» more  SBACPAD 2008»
15 years 8 months ago
Processing Neocognitron of Face Recognition on High Performance Environment Based on GPU with CUDA Architecture
This work presents an implementation of Neocognitron Neural Network, using a high performance computing architecture based on GPU (Graphics Processing Unit). Neocognitron is an ar...
Gustavo Poli, José Hiroki Saito, Joã...
ICCS
2009
Springer
15 years 8 months ago
A Massively Parallel Architecture for Bioinformatics
Abstract. Today’s general purpose computers lack in meeting the requirements on computing performance for standard applications in bioinformatics like DNA sequence alignment, err...
Gerd Pfeiffer, Stefan Baumgart, Jan Schröder,...
HOTI
2005
IEEE
15 years 7 months ago
Performance Characterization of a 10-Gigabit Ethernet TOE
Though traditional Ethernet based network architectures such as Gigabit Ethernet have suffered from a huge performance difference as compared to other high performance networks (e...
Wu-chun Feng, Pavan Balaji, C. Baron, Laxmi N. Bhu...